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2.5 kv isolated rs-485 transceivers with integrated transformer driver ADM2482E/adm2487e rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2008C2009 analog devices, inc. all rights reserved. features isolated rs-485/rs-422 transceivers, configurable as half duplex or full duplex integrated oscillator driver for external transformer 15 kv esd protection on rs-485 input/output pins complies with tia/eia-485-a-98 and iso 8482:1987(e) data rate: 500 kbps/16 mbps 5 v or 3.3 v operation (v dd1 ) 256 nodes on bus true fail-safe receiver inputs safety and regulatory approvals ul recognition: 2500 v rms for 1 minute per ul 1577 vde certificates of conformity din vvde v 0884-10 (vde v 0884-10):2006-12 v iorm = 560 v peak thermal shutdown protection operating temperature range: ?40c to +85c wide-body, 16-lead soic package applications isolated rs-485/rs-422 interfaces industrial field networks multipoint data transmission systems functional block diagram v dd1 v dd2 d1 d2 de txd rxd re gnd 1 gnd 2 y z a b osc galvanic isolation 07379-001 figure 1. general description the ADM2482E/adm2487e are isolated data transceivers with 15 kv esd protection and are suitable for high speed, half- duplex or full-duplex communication on multipoint transmission lines. for half-duplex operation, the transmitter outputs and receiver inputs share the same transmission line. transmitter output pin y is linked externally to receiver input pin a, and transmitter output pin z to receiver input pin b. the parts are designed for balanced transmission lines and comply with tia/eia-485-a-98 and iso 8482:1987(e). the devices employ the analog devices, inc., i coupler? technology to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package. an on-chip oscillator outputs a pair of square waveforms that drive an external transformer to provide isolated power. the logic side of the device is powered with either a 5 v or a 3.3 v supply, and the bus side is powered with an isolated 3.3 v supply. the ADM2482E/adm2487e driver has an active high enable, and the receiver has an active low enable. the driver output enters a high impedance state when the driver enable signal is low. the receiver output enters a high impedance state when the receiver enable signal is high. the device has current-limiting and thermal shutdown features to protect against output short circuits and situations where bus contention might cause excessive power dissipation. the part is fully specified over the industrial temperature range of ?40c to +85c and is available in a 16-lead, wide-body soic package.
ADM2482E/adm2487e rev. a | page 2 of 20 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? timing specifications .................................................................. 4 ? package characteristics ............................................................... 5 ? regulatory information ............................................................... 5 ? insulation and safety-related specifications ............................ 5 ? vde 0884-2 insulation characteristics ..................................... 6 ? absolute maximum ratings ............................................................ 7 ? esd caution .................................................................................. 7 ? pin configuration and function descriptions ............................. 8 ? typical performance characteristics ............................................. 9 ? test circuits ..................................................................................... 12 ? switching characteristics .............................................................. 13 ? circuit description......................................................................... 14 ? electrical isolation ...................................................................... 14 ? truth tables................................................................................. 14 ? thermal shutdown .................................................................... 15 ? true fail-safe receiver inputs .................................................. 15 ? magnetic field immunity .......................................................... 15 ? applications information .............................................................. 16 ? printed circuit board layout ................................................... 16 ? transformer suppliers ............................................................... 16 ? isolated power supply circuit .................................................. 16 ? typical applications ................................................................... 17 ? outline dimensions ....................................................................... 18 ? ordering guide .......................................................................... 18 ? revision history 2/09rev. 0 to rev. a edits to features ................................................................................ 1 added table 5 .................................................................................... 5 changes to table 6 ............................................................................ 5 added table 7 .................................................................................... 6 changes to figure 9 ........................................................................ 13 added table 13 ............................................................................... 16 changes to ordering guide .......................................................... 18 5/08revision 0: initial version
ADM2482E/adm2487e rev. a | page 3 of 20 specifications each voltage is relative to its respective ground; 3.0 v v dd1 5.5 v, 3.0 v v dd2 3.6 v. all minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted. all typical specifications are at t a = 25c, v dd1 = 5 v, v dd2 = 3.3 v, unless otherwise noted. table 1. parameter symbol min typ max unit test conditions supply current power supply current, logic side i dd1 txd/rxd data rate < 500 kbps 3.5 ma unloaded output adm2487e txd/rxd data rate = 500 kbps 4 ma half-duplex configuration, r termination = 120 , see figure 25 ADM2482E txd/rxd data rate = 16 mbps 6.0 ma half-duplex configuration, r termination = 120 , see figure 25 power supply current, bus side i dd2 txd/rxd data rate < 500 kbps 17 ma unloaded output adm2487e txd/rxd data rate = 500 kbps 40 ma v dd2 = 3.6 v, half-duplex configuration, r termination = 120 , see figure 25 ADM2482E txd/rxd data rate = 16 mbps 50 ma v dd2 = 3.6 v, half-duplex configuration, r termination = 120 , see figure 25 driver differential outputs differential output voltage, loaded |v od2 | 2.0 5.0 v r l = 100 (rs-422), see figure 19 1.5 5.0 v r l = 54 (rs-485), see figure 19 |v od3 | 1.5 5.0 v ?7 v v test +12 v, see figure 20 ?|v od | for complementary output states ?|v od | 0.2 v r l = 54 or 100 , see figure 19 common-mode output voltage v oc 3.0 v r l = 54 or 100 , see figure 19 ?|v oc | for complementary output states ?|v oc | 0.2 v r l = 54 or 100 , see figure 19 short-circuit output current i os 250 ma output leakage current (y, z) i o 125 a de = 0 v, re = 0 v, v cc = 0 v or 3.6 v, v in = 12 v ?100 a de = 0 v, re = 0 v, v cc = 0 v or 3.6 v, v in = ?7 v logic inputs input threshold low v il 0.25 v dd1 v de, re , txd input threshold high v ih 0.7 v dd1 v de, re , txd input current i i ?10 +0.01 +10 a de, re , txd receiver differential inputs differential input threshold voltage v th ?200 ?125 ?30 mv ?7 v < v cm < +12 v input voltage hysteresis v hys 15 mv v oc = 0 v input current (a, b) i i 125 a de = 0 v, v dd = 0 v or 3.6 v, v in = 12 v ?125 a de = 0 v, v dd = 0 v or 3.6 v, v in = ?7 v line input resistance r in 96 k ?7 v < v cm < +12 v logic outputs output voltage low v olrxd 0.2 0.4 v i orxd = 1.5 ma, v a ? v b = ?0.2 v output voltage high v ohrxd v dd1 ? 0.3 v dd1 ? 0.2 v i orxd = ?1.5 ma, v a ? v b = 0.2 v short-circuit current i os 100 ma tristate output leakage current i ozr 1 a v dd1 = 5.0 v, 0 v < v o < v dd1
ADM2482E/adm2487e rev. a | page 4 of 20 parameter symbol min typ max unit test conditions transformer driver oscillator frequency f osc 400 500 600 khz v dd1 = 5.0 v 230 330 430 khz v dd1 = 3.3 v switch-on resistance r on 0.5 1.5 start-up voltage v start 2.2 2.5 v common-mode transient immunity 1 25 kv/s v cm = 1 kv, transient magnitude = 800 v 1 cm is the maximum common-mode voltage slew rate that can be sustained while maint aining specification-compliant operation. v cm is the common-mode potential difference between the logic and bus sides. the transient magnitude is the range over which the common-mode is slewed. the comm on-mode voltage slew rates apply to both rising and falling common-mode voltage edges. timing specifications t a = ?40c to +85c, unless otherwise noted. table 2. ADM2482E parameter symbol min typ max unit test conditions driver propagation delay t dplh , t dphl 100 ns r diff = 54 , c l = 100 pf, see figure 21 and figure 26 output skew t dskew 8 ns r diff = 54 , c l = 100 pf, see figure 21 and figure 26 rise time/fall time t dr , t df 15 ns r diff = 54 , c l = 100 pf, see figure 21 and figure 26 enable time t zl , t zh 120 ns r l = 110 , c l = 50 pf, see figure 22 and figure 28 disable time t lz , t hz 150 ns r l = 110 , c l = 50 pf, see figure 22 and figure 28 receiver propagation delay t plh , t phl 110 ns c l = 15 pf, see figure 23 and figure 27 output skew t skew 8 ns c l = 15 pf, see figure 23 and figure 27 enable time t zl , t zh 13 ns r l = 1 k, c l = 15 pf, see figure 24 and figure 29 disable time t lz , t hz 13 ns r l = 1 k, c l = 15 pf, see figure 24 and figure 29 table 3. adm2487e parameter symbol min typ max unit test conditions driver propagation delay t dplh , t dphl 250 700 ns r diff = 54 , c l = 100 pf, see figure 21 and figure 26 output skew t dskew 100 ns r diff = 54 , c l = 100 pf, see figure 21 and figure 26 rise time/fall time t dr , t df 200 1100 ns r diff = 54 , c l = 100 pf, see figure 21 and figure 26 enable time t zl , t zh 2.5 s r l = 110 , c l = 50 pf, see figure 22 and figure 28 disable time t lz , t hz 200 ns r l = 110 , c l = 50 pf, see figure 22 and figure 28 receiver propagation delay t plh , t phl 200 ns c l = 15 pf, see figure 23 and figure 27 output skew t skew 30 ns c l = 15 pf, see figure 23 and figure 27 enable time t zl , t zh 13 ns r l = 1 k, c l = 15 pf, see figure 24 and figure 29 disable time t lz , t hz 13 ns r l = 1 k, c l = 15 pf, see figure 24 and figure 29
ADM2482E/adm2487e rev. a | page 5 of 20 package characteristics table 4. parameter symbol min typ max unit test conditions resistance (input-to-output) 1 r i-o 10 12 capacitance (input-to-output) 1 c i-o 3 pf f = 1 mhz input capacitance 2 c i 4 pf input ic junction-to-case thermal resistance jci 33 c/w thermocouple located at center of package underside output ic junction-to-case thermal resistance jco 28 c/w thermocouple located at center of package underside 1 device considered a 2-terminal device: pin 1 to pin 8 are shorted together, and pin 9 to pin 16 are shorted together. 2 input capacitance is from any input data pin to ground. regulatory information table 5. ADM2482E/adm2487e approvals organization approval type notes ul recognized under the component recognition program of underwriters laboratories, inc. in accordance with ul 1577, each ADM2482E/adm2487e is proof tested by applying an insulation test voltage 3000 v rms for 1 second (current leakage detection limit = 5 a) vde certified according to din v vde v 0884-10 (vde v 0884-10):2006-12 in accordance with din v vde v 0884-10, each ADM2482E/adm2487e is proof tested by applying an insu lation test voltage 1050 v peak for 1 second (partial discharge detection limit = 5 pc) insulation and safety-related specifications table 6. parameter symbol value unit conditions rated dielectric insulation voltage 2500 v rms 1-minute duration minimum external air gap (external clearance) l(i01) 5.15 min mm measured from input termin als to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) 5.5 min mm measured from input termin als to output terminals, shortest distance along body minimum internal gap (internal clearance) 0.017 min mm insulation distance through insulation tracking resistance (comparative tracking index) cti >175 v din iec 112/vde 0303-1 isolation group iiia material group (din vde 0110: 1989-01, table 1 )
ADM2482E/adm2487e rev. a | page 6 of 20 vde 0884-2 insulation characteristics this isolator is suitable for basic electrical isolation only within the safety limit data. maintenance of the safety data must be ensured by means of protective circuits. an asterisk (*) on packages denotes din v vde v 0884-10 approval. table 7. description conditions symbol characteristic unit classifications installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv 300 v rms i to iii 400 v rms i to ii climatic classification 40/85/21 pollution degree (din vde 0110: 1989-01, see table 1 ) 2 voltage maximum working insulation voltage v iorm 560 v peak input-to-output test voltage v pr method b1 v iorm 1.875 = v pr , 100% production tested, t m = 1 sec, partial discharge < 5 pc 1050 v peak method a: 896 v peak after environmental tests, subgroup 1 v iorm 1.6 = v pr , t m = 60 sec, partial discharge <5 pc method a 672 v peak after input and/or safety test, subgroup 2/3): v iorm 1.2 = v pr , t m = 60 sec, partial discharge <5 pc highest allowable overvoltage 1 v tr 4000 v peak safety-limiting values 2 case temperature t s 150 c input current i s, input 265 ma output current i s, output 335 ma insulation resistance at t s 3 r s >10 9 1 transient overvoltage, t tr = 10 sec. 2 the safety-limiting value is the maximum value allowed in the ev ent of a failure. see figure 3 for the thermal derating curve. 3 v io = 500 v.
ADM2482E/adm2487e rev. a | page 7 of 20 absolute maximum ratings each voltage is relative to its respective ground; t a = 25c, unless otherwise noted. table 8. parameter rating v dd1 ?0.5 v to +6 v v dd2 ?0.5 v to +6 v digital input voltages (de, re , txd) ?0.5 v to v dd1 + 0.5 v digital output voltages rxd ?0.5 v to v dd1 + 0.5 v d1, d2 13 v driver output/receiver input voltage range ?9 v to +14 v average output current per pin ?35 ma to +35 ma esd (human body model) on a, b, y, and z pins 15 kv operating temperature range ?40c to +85c storage temperature range ?55c to +150c lead temperature soldering (10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
ADM2482E/adm2487e rev. a | page 8 of 20 pin configuration and fu nction descriptions nc = no connect ADM2482E/ adm2487e top view (not to scale) d1 1 d2 2 g nd 1 3 v dd1 4 v dd2 16 gnd 2 15 a 14 b 13 rxd 5 z 12 re 6 y 11 de 7 nc 10 txd 8 gnd 2 9 07379-002 figure 2. pin configuration table 9. pin function descriptions pin no. mnemonic description 1 d1 transformer driver terminal 1. 2 d2 transformer driver terminal 2. 3 gnd 1 ground, logic side. 4 v dd1 power supply, logic side (3.3 v or 5 v). decoupling capacitor to gnd 1 required; capacitor value should be between 0.01 f and 0.1 f. 5 rxd receiver output data. this output is high when (a C b) > +200 mv and low when (a C b) < C200 mv. the output is tristated when the receiv er is disabled, that is, when re is driven high. 6 re receiver enable input. this is an active low input. dr iving this input low enables the receiver; driving it high disables the receiver. 7 de driver enable input. driving this input high en ables the driver; driving it low disables the driver. 8 txd transmit data. 9 gnd 2 ground, bus side. 10 nc no connect. this pin must be left floating. 11 y driver noninverting output. 12 z driver inverting output. 13 b receiver inverting input. 14 a receiver noninverting input. 15 gnd 2 ground, bus side. 16 v dd2 power supply, bus side (isolated 3.3 v supply). decoupling capacitor to gnd 2 required; capacitor value should b e between 0.01 f and 0.1 f.
ADM2482E/adm2487e rev. a | page 9 of 20 typical performance characteristics 2.30 2.25 2.20 2.15 2.10 2.05 2.00 1.95 ?40 ?15 10 35 60 85 temperature (c) supply current i dd1 (ma) 07379-029 no load 54 ? load 120 ? load 60 50 40 30 20 10 0 ?40 ?15 10 35 60 85 temperature (c) supply current i dd1 (ma) 07379-032 no load 54? load 120 ? load figure 3. adm2487e i dd1 supply current vs. temperature (data rate = 500 kbps, v dd1 = 5 v, v dd2 = 3.3 v, de = 1 v, re = 0 v) figure 6. ADM2482E supply current vs. temperature (see figure 25 ) (data rate = 16 mbps, v dd1 = 5 v, v dd2 = 3.3 v, de = 1, re = 0 v) 600 0 ?40 ?20 0 20 40 60 80 07379-033 temperature (c) driver propagation delay (ns) 500 400 300 200 100 t dplh t dphl 40 35 30 25 20 15 10 5 0 ?40 ?15 10 35 60 85 temperature (c) supply current i dd2 (ma) 07379-030 no load 54? load 120? load figure 7. adm2487e driver propagation delay vs. temperature figure 4. adm2487e i dd2 supply current vs. temperature (see figure 25 ) (data rate = 500 kbps, v dd1 = 5 v, v dd2 = 3.3 v, de = 1 v, re = 0 v) 70 65 60 55 50 45 40 35 30 25 20 ?40 ?15 10 35 60 85 temperature (c) driver propagation delay (ns) 07379-034 t dplh t dphl 4.0 3.9 3.8 3.7 3.6 3.5 3.4 3.3 3.2 3.1 ?40 ?15 10 35 60 85 temperature (c) supply current i dd1 (ma) 07379-031 no load 54 ? load 120 ? load figure 8. ADM2482E driver propagation delay vs. temperature figure 5. ADM2482E i dd1 supply current vs. temperature (data rate = 16 mbps, v dd1 = 5 v, v dd2 = 3.3 v, de = 1 v, re = 0 v)
ADM2482E/adm2487e rev. a | page 10 of 20 0.32 0.30 0.28 0.26 0.24 0.22 0.20 ?40 ?20 0 20 40 60 80 output voltage (v) temperature (c) 07379-019 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 012345 output current (ma) output voltage (v) 07379-016 figure 12. receiver output low voltage vs. temperature (i dd2 = 4 ma) figure 9. output current vs. receiver output high voltage ch1 2.0v ? ch2 2.0v ? m400ns 125ms/s 8.0ns/pt a ch2 1.52v 2 1 d1 d2 07379-020 60 50 40 30 20 10 0 012345 output current (ma) output voltage (v) 07379-017 figure 10. output current vs. receiver output low voltage figure 13. switching waveforms (50 pull-up to v dd1 on d1 and d2) ch1 2.0v ? ch2 2.0v ? m80ns 625ms/s 1.6ns/pt a ch2 1.52v 1 d1 d2 07379-021 4.75 4.74 4.73 4.72 4.71 4.70 4.69 4.68 4.67 ?40 ?20 0 20 40 60 80 output voltage (v) temperature (c) 07379-018 figure 14. switching waveforms (break-before-make, 50 pull-up to v dd1 on d1 and d2) figure 11. receiver output high voltage vs. temperature (i dd2 = ?4 ma)
ADM2482E/adm2487e rev. a | page 11 of 20 07379-035 ch1 2.00v ch2 2.00v ch3 2.00v ch4 2.00v m 200ns a ch2 1.72v 2 4 1 t 47.80% txd z, b t y, a rxd 07379-037 ch1 2.0v ? ch2 2.0v ? ch3 2.0v ? ch4 2.0v ? m 40.0ns 1.25gs/s a ch2 1.68v 2 4 1 it 16.0ps/pt txd z, b y, a rxd figure 15. adm2487e driver/receiver propagation delay, low to high (r diff = 54 , c l1 = c l2 = 100 pf) figure 17. ADM2482E driver/receiver propagation delay, high to low (r diff = 54 , c l1 = c l2 = 100 pf) 07379-036 ch1 2.00v ch2 2.00v ch3 2.00v ch4 2.00v m 200ns a ch2 1.72v 2 4 1 t 48.60% txd y, a rxd z, b t 07379-038 ch1 2.0v ? ch2 2.0v ? ch3 2.0v ? ch4 2.0v ? m 40.0ns 1.25gs/s a ch2 1.68v 2 4 1 it 16.0ps/pt txd z, b y, a rxd figure 16. adm2487e driver/receiver propagation delay, high to low (r diff = 54 , c l1 = c l2 = 100 pf) figure 18. ADM2482E driver/receiver propagation delay, low to high (r diff = 54 , c l1 = c l2 = 100 pf)
ADM2482E/adm2487e rev. a | page 12 of 20 test circuits y z t xd v od2 v oc r l 2 r l 2 07379-003 figure 19. driver voltage measurement y z t xd v od3 0 7379-004 v test 375 ? 375 ? 60 ? figure 20. driver voltage measurement y z t xd 07379-006 r diff c l c l figure 21. driver propagation delay y z txd de s1 s2 v out v cc r l 110? c l 50pf 07379-007 figure 22. driver enable/disable c l v out re a b 07379-008 figure 23. receiver propagation delay v cc s2 +1.5 v ? 1.5v s1 re re in 07379-009 c l r l v out figure 24. receiver enable/disable galvanic isolation v dd1 gnd 1 v dd2 v dd2 gnd 2 y z txd de a b rxd re 120? 07379-005 figure 25. supply current measurement test circuit
ADM2482E/adm2487e rev. a | page 13 of 20 switching characteristics 07379-010 z y v dd1 /2 v dd1 /2 t dphl t dplh 1/2v o v o 90% point 10% point 10% point 90% point v diff = v (y) ? v (z) t dr t df ?v o v diff +v o 0v v dd1 t dskew = | t dplh ? t dphl | figure 26. driver propagation delay, rise/fall timing a ?b rxd 0v 0v 1.5v 1.5v 07379-011 v oh v ol t plh t phl t skew = | t plh ? t phl | figure 27. receiver propagation delay de y , z y , z v dd1 0v 0v v ol v oh 0.5v dd1 0.5v dd1 t zl t lz t zh t hz v ol + 0.5v v oh ? 0.5v 2.3v 2.3v 07379-012 figure 28. driver enable/disable timing output low output high 1.5v 1.5v rxd rxd re 0v 07379-013 0.7v dd1 0.3v dd1 v ol v oh 0.5v dd1 0.5v dd1 t zl t lz t zh t hz v ol + 0.5v v oh ? 0.5v figure 29. receiver enable/disable timing
ADM2482E/adm2487e rev. a | page 14 of 20 circuit description electrical isolation truth tables the truth tables in this section use the abbreviations found in table 10 . in the ADM2482E/adm2487e, electrical isolation is imple- mented on the logic side of the interface. therefore, the part has two main sections: a digital isolation section and a transceiver section (see figure 30 ). driver input and data enable applied to the txd and de pins, respectively, and referenced to logic ground (gnd 1 ) are coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground (gnd 2 ). simi- larly, the receiver output, referenced to isolated ground in the transceiver section, is coupled across the isolation barrier to appear at the rxd pin referenced to logic ground. table 10. truth table abbreviations letter description h high level i indeterminate l low level x irrelevant z high impedance (off ) nc disconnected table 11. transmitting i coupler technology the digital signals transmit across the isolation barrier using i coupler technology. this technique uses chip scale transformer windings to couple the digital signals magnetically from one side of the barrier to the other. digital inputs are encoded into waveforms that are capable of exciting the primary transformer winding. at the secondary winding, the induced waveforms are decoded into the binary value that was originally transmitted. supply status inputs outputs v dd1 v dd2 de txd y z on on h h h l on on h l l h on on l x z z on off x x z z off on l x z z off off x positive and negative logic transitions at the input cause narrow pulses (~1 ns) to be sent to the decoder, via the transformer. the decoder is bistable and is, therefore, either set or reset by the pulses, indicating input logic transitions. in the absence of logic transitions at the input for more than ~1 s, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. if the decoder receives no internal pulses for more than about 5 s, then the input side is assumed to be unpowered or nonfunctional, in which case the output is forced to a default state (see tabl e 10 ). x z z table 12. receiving supply status inputs outputs v dd1 v dd2 re a ? b rxd on on >?0.03 v l or nc h on on ADM2482E/adm2487e digital isolation and transceiver sections
ADM2482E/adm2487e rev. a | page 15 of 20 thermal shutdown the ADM2482E/adm2487e contain thermal shutdown circuitry that protects the parts from excessive power dissipa- tion during fault conditions. shorting the driver outputs to a low impedance source can result in high driver currents. the thermal sensing circuitry detects the increase in die temperature under this condition and disables the driver outputs. this circuitry is designed to disable the driver outputs when a die temperature of 150c is reached. as the device cools, the drivers are re-enabled at a temperature of 140c. true fail-safe receiver inputs the receiver inputs have a true fail-safe feature that ensures that the receiver output is high when the inputs are open or shorted. during line idle conditions, when no driver on the bus is enabled, the voltage across a terminating resistance at the receiver input decays to 0 v. with traditional transceivers, receiver input thresholds specified between ?200 mv and +200 mv mean that external bias resistors are required on the a and b pins to ensure that the receiver outputs are in a known state. the true fail-safe receiver input feature eliminates the need for bias resistors by specifying the receiver input threshold between ?30 mv and ?200 mv. the guaranteed negative thre- shold means that when the voltage between a and b decays to 0 v, the receiver output is guaranteed to be high. magnetic field immunity the limitation on the magnetic field immunity of the i coupler is set by the condition in which an induced voltage in the receiving coil of the transformer is large enough to either falsely set or reset the decoder. the following analysis defines the conditions under which this may occur. the 3 v operating condition of the ADM2482E/adm2487e is examined because it represents the most susceptible mode of operation. the pulses at the transformer output have an amplitude greater than 1 v. the decoder has a sensing threshold of about 0.5 v, thus establishing a 0.5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by n nr dt d v n ,,2,1; 2 k = ? ? ? ? ? ? ? = where: is the magnetic flux density (gauss). n is the number of turns in the receiving coil. r n is the radius of the n th turn in the receiving coil (cm). given the geometry of the receiving coil and an imposed requirement that the induced voltage is, at most, 50% of the 0.5 v margin at the decoder, a maximum allowable magnetic field can be determined using figure 31 . magnetic field frequency (hz) 1k 10k 100k 100m 1m 10m 100 10 1 0.1 0.01 0.001 maximum allowable magnetic flux density (kgauss) 07379-023 figure 31. maximum allowable external magnetic flux density for example, at a magnetic field frequency of 1 mhz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 v at the receiving coil. this is about 50% of the sensing threshold and does not cause a faulty output transition. similarly, if such an event occurs during a transmitted pulse and is the worst-case polarity, it reduces the received pulse from >1.0 v to 0.75 v, still well above the 0.5 v sensing threshold of the decoder. figure 32 shows the magnetic flux density values in terms of more familiar quantities, such as maximum allowable current flow at given distances away from the ADM2482E/adm2487e transformers. magnetic field frequency (hz) 1k 10k 100k 100m 1m 10m distance = 1m distance = 100mm distance = 5mm 1000 100 0.1 1 10 0.01 maximum allowable current (ka) 07379-024 figure 32. maximum allowable current for various current-to-ADM2482E/adm2487e spacings with combinations of strong magnetic field and high frequency, any loops formed by pcb traces can induce error voltages large enough to trigger the thresholds of succeeding circuitry. care should be taken in the layout of such traces to avoid this possibility.
ADM2482E/adm2487e rev. a | page 16 of 20 applications information printed circuit board layout the isolated rs-485 transceiver of the ADM2482E/adm2487e requires no external interface circuitry for the logic interfaces. power supply bypassing is required at the input and output supply pins (see figure 33 ). bypass capacitors are most conveniently connected between pin 3 and pin 4 for v dd1 and between pin 15 and pin 16 for v dd2 . the capacitor value must be between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power supply pin must not exceed 20 mm. bypassing pin 9 and pin 16 is also recommended unless the ground pair on each package side is connected close to the package. d1 d2 gnd 1 v dd1 v dd2 gnd 2 a b rxd re de z y nc txd gnd 2 nc = no connect 07379-025 ADM2482E or adm2487e top view (not to scale) figure 33. recommended printed circuit board layout in applications involving high common-mode transients, care must be taken to ensure that board coupling across the isolation barrier is minimized. furthermore, the board layout must be designed such that any coupling that does occur equally affects all pins on a given component side. failure to ensure this can cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch-up or permanent damage. transformer suppliers the transformer primarily used with the ADM2482E/adm2487e must be a center-tapped transformer winding. the turns ratio of the transformer must be set to provide the minimum required output voltage at the maximum anticipated load with the mini- mum input voltage. table 13 shows ADM2482E/adm2487e transformer suppliers. table 13. transformer supplies manufacturer primary voltage 3.3 v primary voltage 5 v coilcraft da2303-al ga3157 murata 782482/33vc 782482/53vc isolated power supply circuit the ADM2482E/adm2487e integrate a transformer driver that, when used with an external transformer and linear voltage regulator (ldo), generates an isolated 3.3 v power supply to be supplied between v dd2 and gnd 2 , as shown in figure 34 . pin d1 and pin d2 of the ADM2482E/adm2487e drive a center-tapped transformer t1. a pair of schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding. the adp3330 ldo provides a regulated 3.3 v power supply to the ADM2482E/adm2487e bus side circuitry (v dd2 ). when the ADM2482E/adm2487e are powered by 3.3 v on the logic side, a step-up transformer is required to compensate for the forward voltage drop of the schottky diodes and the voltage drop across the regulator. the transformer turns ratio should be chosen to ensure just enough headroom for the adp3330 ldo to output a regulated 3.3 v output under all operating conditions. if the ADM2482E/adm2487e are powered by 5 v on the logic side, then a step-down transformer should be used. for optimum efficiency, the transformer turns ratio should be chosen to ensure just enough headroom for the adp3330 ldo to output a regulated 3.3 v output under all operating conditions. 07379-026 ADM2482E/ adm2487e isolation barrier 1n5817 1n5817 t1 22f v cc v cc 10f mlc v dd1 v dd2 d1 d2 gnd 1 gnd 2 100n f isolated 3.3v 100nf 10f gnd 3.3v in out adp3330 sd err nr figure 34. applications diagram
ADM2482E/adm2487e rev. a | page 17 of 20 07379-027 notes 1. r t is equal to the characteristic impedance of the cable. 2. isolation not shown. typical applications figure 35 and figure 36 show typical applications of the ADM2482E/adm2487e in half-duplex and full-duplex rs-485 network configurations. up to 256 transceivers can be connected to the rs-485 bus. to minimize reflections, the line must be terminated at the receiving end in its characteristic impedance, and stub lengths off the main line must be kept as short as possible. for a half-duplex operation, this means that both ends of the line must be terminated, because either end can be the receiving end. abzy abzy a b z y a b z y r d r d r d r d ADM2482E/ adm2487e ADM2482E/ adm2487e ADM2482E/ adm2487e rxd re de txd rxd re de txd r t r t rxd re de txd rxd re de txd ADM2482E/ adm2487e maximum number of transceivers on bus = 256 notes 1. r t is equal to the characteristic impedance of the cable. figure 35. ADM2482E/adm2487e typical half-duplex rs-485 network r d a b z y r d a b z y r d a b z y r d a b z y r t txd de rxd re ADM2482E/ adm2487e ADM2482E/ adm2487e ADM2482E/ adm2487e slave rxd re de txd ADM2482E/ adm2487e master slave slave rxd re de txd rxd re de txd r t 07379-028 maximum number of nodes = 256 figure 36. ADM2482E/adm2487e typi cal full-duplex rs-485 network
ADM2482E/adm2487e rev. a | page 18 of 20 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-013- aa 032707-b 10.50 (0.4134) 10.10 (0.3976) outline dimensions 0.30 (0.0118) 0.10 (0.0039) 2.65 (0.1043) 2.35 (0.0925) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 0 . 7 5 ( 0 . 0 2 9 5 ) 0 . 2 5 ( 0 . 0 0 9 8 ) 45 1.27 (0.0500) 0.40 (0.0157) c oplanarity 0.10 0.33 (0.0130) 0.20 (0.0079) 0.51 (0.0201) 0.31 (0.0122) seating plane 8 0 16 9 8 1 1.27 (0.0500) bsc figure 37. 16-lead standard small outline package [soic_w] wide body (rw-16) dimensions shown in millimeters and (inches) ordering guide model data rate (mbps) temperature rang e package description package option ADM2482Ebrwz 1 16 ?40c to +85c 16-lead soic_w rw-16 ADM2482Ebrwz-reel7 1 16 ?40c to +85c 16-lead soic_w rw-16 adm2487ebrwz 1 0.5 ?40c to +85c 16-lead soic_w rw-16 adm2487ebrwz-reel7 1 0.5 ?40c to +85c 16-lead soic_w rw-16 eval-ADM2482Eeb3z evaluation board, 3.3 v supply eval2482eeb5z evaluation board, 5 v supply eval-adm2487eeb3z evaluation board, 3.3 v supply eval2487eeb5z evaluation board, 5 v supply 1 z = rohs compliant part.
ADM2482E/adm2487e rev. a | page 19 of 20 notes
ADM2482E/adm2487e rev. a | page 20 of 20 notes ?2008C2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d07379-0-2/09(a)

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